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Home>>Products>>IP for HERON-FPGA modules>>Digital IO with FPGA

Digital IO with HERON-FPGA Modules

  • Standard IP for each HERON-FPGA module
  • VHDL sources so that you can add your own FPGA design
  • Standard IP to provide custom I/O capability

HUNT ENGINEERING FPGA modules provide Digital I/O capability via one or more Digital I/O connectors on the module. The signals provided on the Digital I/O connectors are routed directly to the FPGA via series or parallel resistors for signal termination. The modules support the use of many different I/O standards depending on the capabilities of the Xilinx FPGA that is fitted to each module. They provide a variety of termination schemes varying from on-board parallel or series resistor networks or on-chip Digitally Controlled Impedance.
Single ended signalling is possible, as is differential signalling. When using a differential signalling standard such as LVDS for example, signals are paired on the connectors such that the associated positive and negative signal pairs can be used within the Xilinx FPGA.
This document details all of the issues involved in connecting to the Digital I/Os of your FPGA module including choice of termination scheme, I/O standard selection and differential signalling

Full documentation and downloads for this IP are included in the IP for each HERON-FPGA module

All I/O modules have options for cables and clocks.  Please see our Cables & Clocks policy for more details! 

  pdf  Digital I/O with HERON-FPGA modules
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