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HERON-IO2 Module

HERON-IO2 FPGA module with 2 channels of 12bit 125Mhz A/D & 2 channels of 14bit 125Mhz D/A

HERON-IO2V has Xilinx Virtex^Ž-II FPGA with 1M gates
Need a larger FPGA? See here.

FPGA configuration downloaded using the HERON Serial Bus.

Choice of clocking options

Two 125MSPS 12 bit A/Ds connected to the FPGA

Two 125MSPS 14 bit D/As connected to the FPGA

High analog signal bandwidth of 500Mhz in and 145Mhz out

8 uncommitted digital I/Os

Several serial I/O options possible -- configured by the FPGA.

Connects to all of the HERON FIFOs, UMI and module ID signals

This module can be used with ready made IP to perform often used functions

Price:
(ex VAT & shipping) HERON-IO2: Ł1,995
HERON-IO2 is supplied with a standard set of cables, included in the hardware price. See the information about the HERON-IO2 cable set.

The HERON-IO2 provides a user programmable FPGA along with fast Analog Inputs and outputs for a HERON system. The FPGA controls the sampling of the A/Ds and D/As. The incoming digitised data is then fed to the FPGA where it can be processed, buffered or simply written to a HERON FIFO for use in the rest of the system. The outgoing digitised data is then fed from the FPGA where it can be processed, buffered or simply read from a HERON FIFO.

Using the HERON serial bus allows the FPGA to be configured with a standard module configuration, or a custom one provided by the user or HUNT ENGINEERING. After configuration the module can accept user messages over the HERON serial bus, allowing registers etc to be programmed. If a more significant programming change is required a complete new FPGA configuration can be downloaded. When the final FPGA configuration is known, a PROM can be factory fitted to configure the FPGA directly, such as would be required in an embedded system.

The Digital I/O has a number of voltage formats such as LVTTL or LVCMOS defined by the combination of a jumper setting and the configuration downloaded to the FPGA. In addition it is possible for the HERON-IO2 to provide a choice of RS232, RS485 and Differential ECL serial interfaces.

The HERON-IO2 can access HERON-FIFOs at a rate of 32 bits per FIFO clock in AND 32 bits per FIFO clock out concurrently. For example with a FIFO clock of 100Mhz this is 400Mbytes/sec in AND 400Mbytes/sec out.

The use of a Virtex^Ž-II XC2V1000fg456-4 part allows clock rates of up to 365Mhz, and also provides hard coded multipliers and extended I/O formats such as Low Voltage Differential Signalling (LVDS)
NOTE: Virtex II I/Os are not 5v tolerant!

HERON-IO2 Diagram

Technical Specification

Processor:	Virtex^Ž-II
Memory:	None external to FPGA
Host Bus:	HERON
Maximum Dimensions:	4.0 inches x 2.5inches x 6.5mm high.
Power requirements:	5V dependent on FPGA configuration 12V Max: 500 mA Typ: 300 mA -12V Max:0A Typ:0A
Power Consumption/Dissipation	Max Bare FPGA package dissipation: 2.4W From 5V supply: FPGA PSU power can source 7.2W for Virtex II FPGA PSU power can source 8.7W for Spartan Rest of logic uses 0.6W
Clocking Speed:	A/Ds Max to 125Mhz D/As 0hz to 125Mhz FPGA Max: Virtex II 365Mhz Spartan II 180Mhz
I/O bandwidth:	e.g. HEPC9 400Mb/s in + 400Mb/s out
Analog I/P specifications:	Channels 2 in with common or independent clocking set by jumper Standard input characteristics A/C coupled 200R signal B/W from 750Hz to 500Mhz Zero input noise typically 3 levels maximum 8 levels Offset typically +-3 levels maximum +-12 levels Optional Input Types A/C A/C coupled as standard, but choose I/P impedance from 50R to 1K D/C D/C coupled choose I/P impedance from 50R to 1K, Signal B/W 0hz to 500Mhz but each input must not exceed the range 0v to +5V (of this module). This means a 4V DC offset is required. Zero input noise typically 3 levels maximum 8 levels Offset typically +-12 levels maximum +-16 levels
Analog O/P specifications:	Channels 2 with independent clocking Standard Output characteristics: A/C coupled 200R, signal B/W from 1250Hz to 145Mhz Optional Input types: D/C – 10R signal B/W 0 -145Mhz

Xilinx^Ž Foundation series tools are required to make a new FPGA configuration.
HUNT ENGINEERING provide software to download the FPGA configuration file onto the hardware, plus configuration examples.
HUNT ENGINEERING may offer to provide your configuration file for you, but this may be chargeable.

Need a ready made function? See the IP available for HERON-IO2

HERON-IO2 User Manual

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